HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 538

• Manufacturer Part Number: HD64F2623FA20J
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2623FA20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 14 Smart Card Interface
Rev. 5.00 Jan 10, 2006 page 512 of 1042
REJ09B0275-0500
(1) Data write
(2) Transfer from
(3) Serial data output
Note: When the ERS flag is set, it should be cleared until transfer of the last bit (D7 in LSB-first
I/O data
TXI
(TEND interrupt)
TDR to TSR
In case of normal transmission: TEND flag is set
In case of transmit error:
Legend:
Ds
D0 to D7 : Data bits
Dp
DE
etu: Elementary Time Unit (time for transfer of 1 bit)
When GM = 0
When GM = 1
transmission, D0 in MSB-first transmission) of the next transfer data to be transmitted has
been completed.
Figure 14.5 Relation between Transmit Operation and Internal Registers
Figure 14.6 TEND Flag Generation Timing in Transmission Operation
: Start bit
: Parity bit
: Error signal
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
Data 1
Data 1
Data 1
TDR
ERS flag is set
Steps (2) and (3) above are repeated until the TEND flag is set
(shift register)
11.0etu
Data 1
TSR
12.5etu
; Data remains in TDR
Data 1
I/O signal line output
Guard
time
DE