HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 926

• Manufacturer Part Number: HD64F2623FA20J
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2623FA20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Appendix B Internal I/O Register
LPWRCR—Low-Power Control Register
Rev. 5.00 Jan 10, 2006 page 900 of 1042
REJ09B0275-0500
Bit
Initial value
Read/Write
:
:
:
Direct transfer ON flag
Notes: This bit is valid only in the H8S/2626 Group; in the H8S/2623 Group, 0 must be written to this bit.
0
1
DTON
• When the SLEEP command is executed in high-speed mode or medium-speed mode, operation
• When the SLEEP command is executed in sub-active mode, operation transfers to sub-sleep
• When the SLEEP command is executed in high-speed mode or medium-speed mode, operation
• When the SLEEP command is executed in sub-active mode, operation transfers directly to high-
R/W
transfers to sleep mode, software standby mode, or watch mode *
mode or watch mode
transfers directly to sub-active mode, or transfers to sleep mode or software standby mode
speed mode or transfers to sub-sleep mode
7
0
* Always select high-speed mode when transferring to watch mode or sub-active mode.
Notes: This bit is valid only in the H8S/2626 Group; in the H8S/2623 Group, 0 must be written to this bit.
Low-speed ON flag
0
1
LSON
• When the SLEEP command is executed in high-speed mode or medium-speed mode, operation
• When the SLEEP command is executed in sub-active mode, operation transfers to watch mode,
• Operation transfers to high-speed mode after watch mode is canceled
• When the SLEEP command is executed in high-speed mode, operation transfers to watch mode
• When the SLEEP command is executed in sub-active mode, operation transfers to sub-sleep
• Operation transfers to sub-active mode immediately watch mode is canceled
R/W
transfers to sleep mode, software standby mode, or watch mode*
or directly to high-speed mode
or sub-active mode
mode or watch mode
6
0
* Always select high-speed mode when transferring to watch mode or sub-active mode.
NESEL
R/W
Noise elimination sampling frequency select
Note: This bit is valid only in the H8S/2626 Group; in the
5
0
0 Sampling uses /32 clock
1
Sampling uses /4 clock
H8S/2623 Group, 0 must be written to this bit.
SUBSTP
R/W
Subclock enable
Note: This bit is valid only in the H8S/2626 Group; in the
4
0
0 Subclock generation enabled
1
Subclock generation disabled
H8S/2623 Group, 0 must be written to this bit.
H'FDEC
RFCUT
R/W
Oscillator circuit feedback resistor control bit
0 Feedback resistor ON when main clock operating;
1
3
0
OFF when not operation
Feedback resistor OFF
Frequency multiplier
Note: A system clock frequency multiplied
R/W
STC1
—
2
0
0
1
by the multiplication factor (STC1
and STC0) should not exceed the
maximum operating frequency
defined in section 22, Electrical
Characteristics.
Clock Pulse Generator
STC0
0
1
0
1
STC1
R/W
1
0
Do not set
1 (initial value)
2
4
STC0
R/W
0
0