HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 896

• Manufacturer Part Number: HD64F2623FA20J
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2623FA20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Appendix B Internal I/O Register
IMR—Interrupt Mask Register
Rev. 5.00 Jan 10, 2006 page 870 of 1042
REJ09B0275-0500
IMR
Bit
Initial value
Read/Write
Overload frame/bus off recovery interrupt mask
0 Overload frame/bus off recovery interrupt request (OVR0) to CPU by IRR7 enabled
1
Overload frame/bus off recovery interrupt request (OVR0) to CPU by IRR7 disabled
Bus off interrupt mask
0 Bus off interrupt request (ERS0) to CPU by IRR6 enabled
1
:
:
:
Bus off interrupt request (ERS0) to CPU by IRR6 disabled
IMR7
R/W
Error passive interrupt mask
15
0 Error passive interrupt request to (ERS0) CPU by IRR5 enabled
1
1
Error passive interrupt request to (ERS0) CPU by IRR5 disabled
Receive overload warning interrupt mask
0 REC error warning interrupt request
1
IMR6
R/W
REC error warning interrupt request
(OVR0) to CPU by IRR4 disabled
(OVR0) to CPU by IRR4 enabled
14
1
Transmit overload warning interrupt mask
0 TEC error warning interrupt request
1
IMR5
R/W
13
1
(OVR0) to CPU by IRR3 enabled
TEC error warning interrupt request
(OVR0) to CPU by IRR3 disabled
Remote frame request interrupt mask
0 Remote frame reception interrupt request
1
(OVR0) to CPU by IRR2 enabled
Remote frame reception interrupt request
(OVR0) to CPU by IRR2 disabled
IMR4
R/W
12
1
Receive message interrupt mask
0 Message reception interrupt request
1
H'F816
(RM1) to CPU by IRR1 enabled
Message reception interrupt request
(RM1) to CPU by IRR1 disabled
IMR3
R/W
11
1
IMR2
R/W
10
1
IMR1
R/W
9
1
—
R
8
0
HCAN