HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 348

• Manufacturer Part Number: HD64F2623FA20J
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2623FA20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 10 16-Bit Timer Pulse Unit (TPU)
Bits 5 to 0—Timer Synchro 5 to 0 (SYNC5 to SYNC0): These bits select whether operation is
independent of or synchronized with other channels.
When synchronous operation is selected, synchronous presetting of multiple channels *
synchronous clearing through counter clearing on another channel *
Notes: 1. To set synchronous operation, the SYNC bits for at least two channels must be set to 1.
Bit n
SYNCn
0
1
10.2.10 Module Stop Control Register A (MSTPCRA)
MSTPCRA is an 8-bit readable/writable register that performs module stop mode control.
When the MSTPA5 bit in MSTPCRA is set to 1, TPU operation stops at the end of the bus cycle
and a transition is made to module stop mode. Registers cannot be read or written to in module
stop mode. For details, see sections 21A.5, 21B.5, Module Stop Mode.
MSTPCRA is initialized to H'3F by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 5—Module Stop (MSTPA5): Specifies the TPU module stop mode.
Bit 5
MSTPA5
0
1
Rev. 5.00 Jan 10, 2006 page 322 of 1042
REJ09B0275-0500
Bit
Initial value :
R/W
2. To set synchronous clearing, in addition to the SYNC bit , the TCNT clearing source
must also be set by means of bits CCLR2 to CCLR0 in TCR.
Description
TCNTn operates independently (TCNT presetting/clearing is unrelated to
other channels)
TCNTn performs synchronous operation
TCNT synchronous presetting/synchronous clearing is possible
Description
TPU module stop mode cleared
TPU module stop mode set
:
:
MSTPA7 MSTPA6 MSTPA5 MSTPA4 MSTPA3 MSTPA2 MSTPA1 MSTPA0
R/W
7
0
R/W
6
0
R/W
5
1
R/W
4
1
R/W
3
1
2
are possible.
R/W
2
1
R/W
1
1
(Initial value)
(Initial value)
1
, and
n = 5 to 0
R/W
0
1