HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 457

IC H8S MCU FLASH 256K 100-QFP

HD64F2623FA20J

Manufacturer Part Number
HD64F2623FA20J
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2623FA20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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13.2.6
SCR is a register that performs enabling or disabling of SCI transfer operations, serial clock output
in asynchronous mode, and interrupt requests, and selection of the serial clock source.
SCR can be read or written to by the CPU at all times.
SCR is initialized to H'00 by a reset and in hardware standby mode. It retains its previous state in
module stop mode, software standby mode, watch mode, subactive mode, and subsleep mode.
Bit 7—Transmit Interrupt Enable (TIE): Enables or disables transmit data empty interrupt
(TXI) request generation when serial transmit data is transferred from TDR to TSR and the TDRE
flag in SSR is set to 1.
Note: TXI interrupt request cancellation can be performed by reading 1 from the TDRE flag, then
Bit 7
TIE
0
1
Bit
Initial value
R/W
clearing it to 0, or clearing the TIE bit to 0.
Serial Control Register (SCR)
Description
Transmit data empty interrupt (TXI) requests disabled
Transmit data empty interrupt (TXI) requests enabled
:
:
:
R/W
TIE
7
0
R/W
RIE
6
0
R/W
TE
5
0
Section 13 Serial Communication Interface (SCI)
R/W
RE
4
0
Rev. 5.00 Jan 10, 2006 page 431 of 1042
MPIE
R/W
3
0
TEIE
R/W
2
0
CKE1
REJ09B0275-0500
R/W
1
0
(Initial value)
CKE0
R/W
0
0

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