HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 274

IC H8S MCU FLASH 256K 100-QFP

HD64F2623FA20J

Manufacturer Part Number
HD64F2623FA20J
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2623FA20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 9 I/O Ports
Port B Data Register (PBDR)
PBDR is an 8-bit readable/writable register that stores output data for the port B pins (PB7 to
PB0). PBDR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior
state in software standby mode.
Port B Register (PORTB)
Note:
PORTB is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port B pins (PB7 to PB0) must always be performed on PBDR.
If a port B read is performed while PBDDR bits are set to 1, the PBDR values are read. If a port B
read is performed while PBDDR bits are cleared to 0, the pin states are read.
After a reset and in hardware standby mode, PORTB contents are determined by the pin states, as
PBDDR and PBDR are initialized. PORTB retains its prior state in software standby mode.
Port B MOS Pull-Up Control Register (PBPCR)
PBPCR is an 8-bit readable/writable register that controls the MOS input pull-up function
incorporated into port B on an individual bit basis.
Rev. 5.00 Jan 10, 2006 page 248 of 1042
REJ09B0275-0500
Bit
Initial value :
R/W
Bit
Initial value :
R/W
Bit
Initial value :
R/W
* Determined by state of pins PB7 to PB0.
:
:
:
:
:
:
PB7PCR PB6PCR PB5PCR PB4PCR PB3PCR PB2PCR PB1PCR PB0PCR
PB7DR
R/W
R/W
PB7
—*
R
7
0
7
7
0
PB6DR
R/W
R/W
PB6
—*
R
6
0
6
6
0
PB5DR
R/W
PB5
R/W
—*
R
5
0
5
5
0
PB4DR
R/W
PB4
R/W
—*
R
4
0
4
4
0
PB3DR
R/W
PB3
R/W
—*
R
3
0
3
3
0
PB2DR
R/W
PB2
R/W
—*
R
2
0
2
2
0
PB1DR
R/W
PB1
R/W
—*
R
1
0
1
1
0
PB0DR
R/W
PB0
R/W
—*
R
0
0
0
0
0

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