HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 678

• Manufacturer Part Number: HD64F2623FA20J
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2623FA20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 19 ROM (Preliminary)
19.7.2
In program-verify mode, the data written in program mode is read to check whether it has been
correctly written in the flash memory.
After the elapse of the given programming time, clear the P1 bit in FLMCR1, then wait for at least
( ) µs before clearing the PSU1 bit to exit program mode. After the elapse of at least ( ) µs, the
watchdog timer is cleared and the operating mode is switched to program-verify mode by setting
the PV1 bit in FLMCR1. Before reading in program-verify mode, a dummy write of H'FF data
should be made to the addresses to be read. The dummy write should be executed after the elapse
of ( ) µs or more. When the flash memory is read in this state (verify data is read in 16-bit units),
the data at the latched address is read. Wait at least ( ) µs after the dummy write before performing
this read operation. Next, the originally written data is compared with the verify data, and
reprogram data is computed (see figure 19.11) and transferred to RAM. After verification of 128
bytes of data has been completed, exit program-verify mode, wait for at least ( ) µs, then clear the
SWE1 bit in FLMCR1. If reprogramming is necessary, set program mode again, and repeat the
program/program-verify sequence as before. The maximum number of repetitions of the
program/program-verify sequence is indicated by the maximum programming count (N).
However, ensure that the program/program-verify sequence is not repeated more than (N) times on
the same bits.
Notes on Program/Program-Verify Procedure
1. In order to perform 128-byte-unit programming, the lower 8 bits of the write start address must
2. When performing continuous writing of 128-byte data to flash memory, byte-unit transfer
3. Verify data is read in word units.
4. The write pulse is applied and a flash memory write executed while the P1 bit in FLMCR1 is
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REJ09B0275-0500
be H'00 or H'80.
should be used.
128-byte data transfer is necessary even when writing fewer than 128 bytes of data. Write
H'FF data to the extra addresses.
set. In the H8S/2626 and H8S/2623, write pulses should be applied as follows in the
program/program-verify procedure to prevent voltage stress on the device and loss of write
data reliability.
a. After write pulse application, perform a verify-read in program-verify mode and apply a
write pulse again for any bits read as 1 (reprogramming processing). When all the 0-write
bits in the 128-byte write data are read as 0 in the verify-read operation, the
program/program-verify procedure is completed. In the H8S/2626 and H8S/2623, the
Program-Verify Mode