upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 250

• Manufacturer Part Number: upd70f3402
• Description: 32-/16-bit Single-chip Microcontroller With Can Interface
• Manufacturer: Renesas Electronics Corporation.

6.5 Programmable Clock output Function (PCL)
It is possible to output a clock independent from CPU clock on pin P913/TIP20/TOP20/INTP4/PCL. The
programmable clock output frequency is equal to f
OCKS3 registers). Corresponding ports registers have to be set accordingly (Refer to section 4.3
6.5.1 Control registers
(1)
Caution:
Caution:
250
”Port Configuration” on page 107).
Symbol
PCLM
R/W
PCK2
PCLE
Programmable clock mode register (PCLM)
This is an 8-bit register that controls the PCL output. This register can be read or written in 8-bit or
1-bit units.
0
0
0
0
1
1
1
1
0
1
PCLE can set to 1 after setting the port control registers (PM, PMC, PFC, PFCE).
This bit can set to 1 on PLL operation. And this bit has to be cleared to 0 before
stopping the PLL.
Before modifying the output selection clock, PCL output has to be stopped (PCLE bit
cleared to 0).
PCL output disable (PCL output level is low)
PCL output enable
R
7
0
PCK1
0
0
1
1
0
0
1
1
Figure 6-16: Programmable Clock Mode Register (PCLM) Format
R
6
0
PCK0
0
1
0
1
0
1
0
1
R
5
0
User’s Manual U16702EE3V2UD00
Chapter 6 Clock Generator
PCLE
R/W
4
PCL operation selection
R
3
0
PLL_MCKSEL
PCK2
f
R/W
f
f
f
PCL1
PCL1
PCL1
PCL1
2
f
PCL1
Setting prohibited
PLL output select
=
=
=
=
f
=
f
f
f
PLL_MCKSEL
PLL_MCKSEL
PLL_MCKSEL
PLL_MCKSEL
PCK1
f
R/W
divided by two prescalers (PCLM and
PLL_MCKSEL
1
PCK0
R/W
0
/ 16
/ 2
/ 4
/ 8
FFFFF82FH
Address
After reset
01H