upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 486

• Manufacturer Part Number: upd70f3402
• Description: 32-/16-bit Single-chip Microcontroller With Can Interface
• Manufacturer: Renesas Electronics Corporation.

14.3.10 Additional Timing and Delay Selections
(1)
486
Delay Selection of Receive Termination Interrupt Signal (INTC3nI)
In master mode, the CSIT bit of the CSIM register can be used to delay the generation of the
receive termination interrupt signal (INTC3nI) by a half serial clock cycle (SCK3). The CSIT bit
takes effect only in the master mode and is ignored in slave mode.
Figure 14-21 below illustrates the CSIT function, assuming a setting of CSIT=1, CSWE=0, CKP=0,
DAP=0 and CCL[3:0] = [1,0,0,0].
Figure 14-21: Delay Selection of Receive Termination Interrupt (INTC3nI)
CS3n[3:0]
INTC3nI
SCK3
SO3
SI3
DO7
DI7
Chapter 14 Queued CSI (CSI30, CSI31)
DO6
DI6
User’s Manual U16702EE3V2UD00
DO5
DI5
DO4
CS
DI4
DO3
DI3
DO2
DI2
DO1
DI1
delay
DO0
DI0
delay
DO7
CS
DI7