upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 266

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upd70f3402

Manufacturer Part Number
upd70f3402
Description
32-/16-bit Single-chip Microcontroller With Can Interface
Manufacturer
Renesas Electronics Corporation.
Datasheet
TPnIOC2
(5)
Cautions: 1. Rewrite TPnEES1, TPnEES0, TPnETS1, and TPnETS0 bits when TPnCE = 0 (the
Remark:
266
Symbol
TMP I/O control register 2 (TPnIOC2)
The TPnIOC2 register is an 8-bit register that controls the valid edge for external event count input
signals (TIPn0) and external trigger input signal (TIPn0).
This register can be read and written in 8-bit or 1-bit units.
RESET input clears this register to 00H.
TPnEES1
TPnETS1
Address: TP0IOC2: FFFFF594H, TP1IOC2: FFFFF5A4H
0
0
1
1
0
0
1
1
2. TPnEES1 and TPnEES0 bits are valid only when TPnEEE = 1 or when the external
n = 0 to 3
7
0
Figure 7-9: TMPn Dedicated I/O Control Register 2 (TPnIOC2) Format
same value can be written when TPnCE = 1.). If rewriting was mistakenly
performed, clear TPnCE to 0 and then set the bits again.
event count mode has been set (TPnMD2 to TPnMD0 of TPnCTL1 register = 001).
TP2IOC2: FFFFF5B4H, TP3IOC2: FFFFF5C4H
TPnEES0
TPnETS0
6
0
0
1
0
1
0
1
0
1
5
0
Chapter 7 16-Bit Timer/Event Counter P
No edge detection
Detection of rising edge
Detection of falling edge
Detection of both edges
No edge detection
Detection of rising edge
Detection of falling edge
Detection of both edges
User’s Manual U16702EE3V2UD00
4
0
External event count input valid edge setting (TIPn0)
External trigger input valid edge detection (TIPn0)
TPnEES1 TPnEES0 TPnETS1 TPnETS0
3
2
1
0
FFFFF5C4H
FFFFF594H
Address
to
R/W
R/W 00H
reset
After

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