upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 727

• Manufacturer Part Number: upd70f3402
• Description: 32-/16-bit Single-chip Microcontroller With Can Interface
• Manufacturer: Renesas Electronics Corporation.

18.3 HALT Mode
18.3.1 Setting and operation status
The HALT mode is set when a dedicated instruction (HALT) is executed in the normal operation mode.
In the HALT mode, the clock oscillator continues operating. Only clock supply to the CPU is
clock supply to the other on-chip peripheral functions continues.
As a result, program execution is stopped, and the internal RAM retains the contents before the HALT
mode was set. The on-chip peripheral functions that are independent of instruction processing by the
CPU continue operating.
Table 18-2 shows the operation status in the HALT mode.
Cautions: 1. Insert five or more NOP instructions after the HALT instruction.
18.3.2 Releasing HALT mode
The HALT mode is released by a non-maskable interrupt request (NMI pin input, INTWDT2
occurrence), unmasked external interrupt request (INTP0 to INTP7 pin input), unmasked internal
interrupt request from the peripheral functions operable in the software HALT mode, or reset signals
(reset by RESET pin input, WDT2RES signal, low-voltage detector (LVI), or clock monitor (CLM)).
After the HALT mode has been released, the normal operation mode is restored.
(1)
Non-maskable interrupt request Execution branches to the handler address
Maskable interrupt request
Releasing HALT mode by non-maskable interrupt request or unmasked maskable interrupt
request
The HALT mode is released by a non-maskable interrupt request or an unmasked maskable
interrupt request, regardless of the priority of the interrupt request. If the HALT mode is set in an
interrupt servicing routine, however, an interrupt request that is issued later is serviced as follows.
(a) If an interrupt request with a priority lower than that of the interrupt request currently being
(b) If an interrupt request with a priority higher than that of the interrupt request currently being
Release Source
serviced is issued, only the HALT mode is released, and that interrupt request is not
acknowledged. The interrupt request itself is retained.
serviced is issued (including a non-maskable interrupt request), the HALT mode is released
and that interrupt request is acknowledged.
2. If the HALT instruction is executed while an unmasked interrupt request signal is
Table 18-2: Operation After Releasing HALT Mode by Interrupt Request
being held pending, the status shifts to HALT mode, but the HALT mode is then
released immediately by the pending interrupt request.
User’s Manual U16702EE3V2UD00
Execution branches to the handler
address or the next instruction is
executed
Chapter 18 Standby Function
Interrupt Enabled (EI) Status
The next instruction is executed
Interrupt Disabled (DI) Status
stopped,
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