upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 357

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upd70f3402

Manufacturer Part Number
upd70f3402
Description
32-/16-bit Single-chip Microcontroller With Can Interface
Manufacturer
Renesas Electronics Corporation.
Datasheet
TM0CTL0 TM0CE
9.3 Control Register
(1)
Caution:
Remark:
Symbol
TMM0 timer control register (TM0CTL0)
The TMM0 timer control register (TM0CTL0) is an 8-bit register used to control the timer
operation.
This register can be read and written in 8-bit or 1-bit units.
RESET input clears this register to 00H.
The same value can always be written to the TM0CTL0 register by software.
The TM0CE bit controls the internal operating clock and asynchronously resets TMM0.
When this bit is cleared to 0, the internal operating clock of TMM is stopped (fixed to the low
level), and TMM0 is asynchronously reset.
When the TM0CE bit is set to 1, the internal operating clock is enabled within two input
clocks, and the timer counts up.
<7>
TM0CKS2
Bits TM0CKS2 to TM0CKS0 can be rewritten when TM0CE = 0.
However, bits TM0CKS2 to TM0CKS0 and bit TM0CE are mapped to the same
register.
Therefore, when changing the value of TM0CE from 0 to 1, it is also possible to
change the value of bits TM0CKS2 to TM0CKS0.
f
f
XX
RING
TM0CE
:
0
1
0
0
0
0
1
1
1
1
: Ring-OSC frequency
Internal system clock frequency
Figure 9-3: TMM0 Timer Control Register (TM0CTL0) Format
6
0
Disable internal operating clock operation (asynchronously reset TMM0).
Enable internal operating clock operation.
TM0CKS1
0
0
1
1
0
0
1
1
5
0
User’s Manual U16702EE3V2UD00
Chapter 9 16-Bit Interval Timer M
Internal clock operation enable/disable specification
4
0
TM0CKS0
0
1
0
1
0
1
0
1
3
0
TM0CKS2 TM0CKS1 TM0CKS0 FFFFF690H R/W 00H
f
f
f
f
f
f
f
f
XX
XX
XX
XX
XX
XX
XX
RING
/2
/4
/64
/512
/32
/8
2
Internal count clock selection
1
0
Address
R/W
After
reset
357

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