upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 442

• Manufacturer Part Number: upd70f3402
• Description: 32-/16-bit Single-chip Microcontroller With Can Interface
• Manufacturer: Renesas Electronics Corporation.

13.6 Interrupt Request Signals
CSIBn can generate the following two types of interrupt request signals.
Of these two interrupt request signals, the reception complete interrupt request signal has the higher
priority by default, and the priority of the transmission enable interrupt request signal is lower.
(1)
(2)
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• Reception complete interrupt request signal (INTCBnR)
• Transmission enable interrupt request signal (INTCBnT)
Reception complete interrupt request signal (INTCBnR)
When receive data is transferred to the CBnRX register while reception is enabled, the reception
complete interrupt request signal is generated.
This interrupt request signal can also be generated if a reception error occurs, instead of a recep-
tion error interrupt.
When the reception complete interrupt request signal is acknowledged and the data is read, read
the CBnSTR register to check that the result of reception is not an error.
The reception complete interrupt request signal is not generated while reception is disabled.
Transmission enable interrupt request signal (INTCBnT)
The transmission enable interrupt request signal is generated when transmit data is transferred
from the CBnTX register while transmission enabled.
Table 13-3: Interrupts and their Default Priority
Chapter 13 3-Wire Serial Interface (CSIB)
Transmission enable
Reception complete
User’s Manual U16702EE3V2UD00
Interrupt
Priority
High
Low