upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 377

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upd70f3402

Manufacturer Part Number
upd70f3402
Description
32-/16-bit Single-chip Microcontroller With Can Interface
Manufacturer
Renesas Electronics Corporation.
Datasheet
(4)
Cautions: 1. When bit PDB of A/D converter mode register 1H (ADSCM1H) is changed from 0
Caution:
ADSCM1H
FR3 FR2 FR1 FR0
Symbol
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
R/W
PDB
AD converter mode register 1H (ADSCM1H)
This register is used to control the power supply to the AD converter and also set the conversion
time.
RESET input clears this register to 00H.
0
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
2. When not using the A/D converter, stop its operation by setting the PDB bit = 0.
The maximum conversion clock is 16 MHz. Always select a conversion input clock
and internal bus operating frequency that fits this specification.
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
A/D converter power OFF
A/D converter power ON
PDB
R/W
7
to 1, an A/D core stabilization time of 1 µs is required prior to the first conversion
only.
Figure 11-6: AD Converter Mode Register 1H (ADSCM1H) Format
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Conversion
R
6
0
f
f
f
f
f
f
f
f
clock
XX
XX
XX
XX
XX
XX
XX
XX
f
f
f
f
XX
XX
XX
XX
/ 4
/ 4
/ 4
/ 4
/ 2
/ 2
/ 2
/ 2
User’s Manual U16702EE3V2UD00
R
5
0
Select
Mode
15.1
9.8
7.1
5.8
7.5
4.9
3.5
2.9
Chapter 11 A/D Converter
f
XX
R
0
4
= 24 MHz
Polling Mode
Scan Mode
R/W
FR3
14.7
and
9.3
6.7
5.3
7.3
4.7
3.3
2.7
3
Power down bit
(setting prohibited)
FR2
R/W
2
Select
Mode
Conversion Rate (µs)
11.3
7.3
5.3
4.3
5.7
3.7
2.7
2.2
f
XX
R/W
FR1
= 32 MHz
1
illegal
Polling Mode
Scan Mode
and
5.5
3.5
2.5
2.0
11
7
5
4
FR0
R/W
0
Select Mode
FFFFF203H
Address
9.1
5.9
4.3
3.5
f
XX
= 40 MHz
illegal
Polling Mode
Scan Mode
After reset
and
8.8
5.6
4.0
3.2
00H
377

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