upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 714

• Manufacturer Part Number: upd70f3402
• Description: 32-/16-bit Single-chip Microcontroller With Can Interface
• Manufacturer: Renesas Electronics Corporation.

17.4 Software Exception
A software exception is generated when the CPU executes the TRAP instruction, and can always be
acknowledged.
17.4.1 Operation
If a software exception occurs, the CPU performs the following processing, and transfers control to the
handler routine.
<1> Saves the restored PC to EIPC.
<2> Saves the current PSW to EIPSW.
<3> Writes an exception code to the lower 16 bits (EICC) of ECR (interrupt source).
<4> Sets the EP and ID bits of the PSW.
<5> Sets the handler address (00000040H or 00000050H) corresponding to the software exception to
Figure 17-24 illustrates the processing of a software exception.
Note: TRAP instruction format: TRAP vector (the vector is a value from 0 to 1FH.)
The handler address is determined by the TRAP instruction’s operand (vector). If the vector is 0 to 0FH,
it becomes 00000040H, and if the vector is 10H to 1FH, it becomes 00000050H.
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the PC, and transfers control.
Chapter 17 Interrupt/Exception Processing Function
CPU processing
Figure 17-24: Software Exception Processing
User’s Manual U16702EE3V2UD00
EIPC
EIPSW
ECR.EICC
PSW.EP
PSW.ID
PC
Exception processing
TRAP instruction
Restored PC
PSW
Exception code
1
1
Handler address
Note