upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 738

• Manufacturer Part Number: upd70f3402
• Description: 32-/16-bit Single-chip Microcontroller With Can Interface
• Manufacturer: Renesas Electronics Corporation.

(2)
Cautions: 1. Be sure to clear bits 2 to 7 of the PSMR register to 0.
Remark:
738
Symbol
PSMR
R/W
Power save mode register (PSMR)
This is an 8-bit register that controls the operation status in the power save mode and the clock
operation.
This register can be read or written in 8-bit or 1-bit units.
PSM1
2. The PSM0 and PSM1 bits are valid only when the STP bit of the PSC register is 1.
IDLE1: In this mode, all operations except the oscillator operation, flash memory, and PLL
IDLE2: <Case of PLL not use>
STOP: In this mode, all operations are stopped.
0
0
1
1
R
7
0
PSM0
are stopped. After the IDLE1 mode is released, the normal mode need not wait
the lapse of the oscillation stabilization time.
In this mode, all operations except the oscillator operation are stopped.
After the IDLE2 mode is released, the normal mode is returned to following the
lapse of the setup time (flash memory) specified by the OSTS register.
<Case of PLL use>
Refer to CHAPTER 6.6.2 How to Use.
After the STOP mode is released, the normal mode is returned to following the
lapse of the oscillation stabilization time specified by the OSTS register.
Figure 18-8: Power Save Mode Register (PSMR) Format
R
6
0
0
1
0
1
(this bit becomes valid when bit 1 (STP) of the PSC register is set to 1)
R
5
0
Chapter 18 Standby Function
User’s Manual U16702EE3V2UD00
R
4
0
Specifies operation in software standby mode
R
3
0
Setting prohibited
IDLE1 mode
IDLE2 mode
STOP mode
R
2
0
PSM1
R/W
1
PSM0
R/W
0
FFFFF820H
Address
After reset
00H