upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 392

• Manufacturer Part Number: upd70f3402
• Description: 32-/16-bit Single-chip Microcontroller With Can Interface
• Manufacturer: Renesas Electronics Corporation.

11.6 Precautions on Operation
11.6.1 Stopping A/D
If 0 is written in the CE bit of the ADSCM0H register during A/D conversion operation,
it stops A/D conversion operation and an A/D conversion result is not stored in the ADACRn register
(n = 0 to 15).
11.6.2 Trigger input during A/D conversion operation
If a trigger is input during A/D conversion operation, the conversion operation stops and starts over from
the beginning
11.6.3 External or timer trigger interval
Make the trigger interval (input time interval) in external or timer trigger mode longer than the
conversion time specified by the FR3 to FR0 bits of the ADSCM1H register.
(1)
(2)
(3)
11.6.4 Operation in standby modes
(1)
(2)
392
When interval = 0
If multiple triggers are input simultaneously, the analog input whose ANIn pin number is smallest
is converted. The other trigger signals input at the same time are ignored (n = 0 to 15).
When 0 < interval < conversion time
If an external or timer trigger is input during A/D conversion operation, that trigger input is ignored.
When interval = conversion time
If an external or timer trigger is input at the same time as A/D conversion termination (comparison
termination signal and trigger contention), interrupt generation and ADA0CRn register storage of
the value with which conversion terminated are performed correctly (n = 0 to 15).
HALT mode
A/D converter continues the operation. When recover from HALT mode, the ADSCM0H,
ADSCM0L, ADSCM1H, ADVMS0, or SELCNT1 register and ADA0CRn, ADA0CRSS or
ADA0CRDD register maintain their values (n = 0 to 15).
If released by RESET input, all registers are initialized.
IDLE mode, software STOP mode
Since clock supply to A/D converter stops, A/D conversion operation is not performed.
If released by NMI or maskable interrupt input, the ADSCM0H, ADSCM0L, ADSCM1H, ADVMS0,
or SELCNT1 register and ADA0CRn, ADA0CRSS or ADA0CRDD register maintain their values
(n = 0 to 15).
However, if IDLE mode or software STOP mode is set during A/D conversion operation, A/D
conversion operation stops. If released by a non-maskable interrupt request or an unmasked
maskable interrupt request, conversion resumes but the conversion result written in the ADA0CRn
register becomes undefined (n = 0 to 15).
If released by RESET input, all registers are initialized.
User’s Manual U16702EE3V2UD00
Chapter 11 A/D Converter