upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 732

• Manufacturer Part Number: upd70f3402
• Description: 32-/16-bit Single-chip Microcontroller With Can Interface
• Manufacturer: Renesas Electronics Corporation.

(2)
732
Non-maskable interrupt
request
Maskable interrupt
request
Item
Main clock oscillator (f
Ring clock generator (f
PLL
Flash charge pump
CPU
DMA
Interrupt controller
Timer P (TMP0 to TMP3)
Timer Q (TMQ0, TMQ1)
Timer M (TMM0)
Watchdog timer 2 (WDT2)
Serial
interface
AFCAN0, AFCAN1
A/D converter
External bus interface
Port function
Internal data
Releasing IDLE2 mode by RESET pin input
The same operation as the normal reset operation is performed.
Release Source
Setting of IDLE2 Mode
Table 18-6: Operation After Releasing IDLE2 Mode by Interrupt Request
CSIB0, CSIB1
UARTA0, UARTA1
CSI30, CSI31
X
R
)
)
Execution branches to the handler address after securing the prescribed setup time.
Execution branches to the handler
address or the next instruction is
executed after securing the prescribed
setup time.
Table 18-7: Operation Status in IDLE2 Mode
Interrupt Enabled (EI) Status
Oscillation enabled
Oscillation enabled
Stops operation
Operable
Stops operation
Stops operation
Stops operation (Standby mode release enabled)
Stops operation
Stops operation
Operable when f
Operable when f
Operable when SCKB0, SCKB1 input clock is selected as operation clock
Stops operation (Operable when ASCKA0 input clock is selected as
operation clock)
Stops operation
Stops operation
Stops operation
Refer to CHAPTER 5 BUS CONTROL FUNCTION.
Retains status before IDLE2 mode was set.
The CPU registers, statuses, data, and all other internal data such as the
contents of the internal RAM are retained as they were before the IDLE2
mode was set.
Chapter 18 Standby Function
User’s Manual U16702EE3V2UD00
R
R
/8 is selected as the count clock
is selected as the count clock
Operation Status
The next instruction is executed after
securing the prescribed setup time.
Interrupt Disabled (DI) Status