upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 524

• Manufacturer Part Number: upd70f3402
• Description: 32-/16-bit Single-chip Microcontroller With Can Interface
• Manufacturer: Renesas Electronics Corporation.

15.5.3 Block transfer mode
In Block transfer mode, once transfer starts, DMA continues the transfer operation without releasing the
bus until the set number of transfers is done and the TC signal is set. No other DMA request is acknowl-
edged during that Block transfer.
After the Block transfer ends, the DMAC releases the bus before another DMA transfer can be acknowl-
edged.
Figure 15-17 is an example of a Block transfer when two DMA forwarding demands of DMMRQ0 and
DMMRQ3 are generated. The transfer counter for both channels is set to 4 transfers.
15.5.4 Summary on the transfer modes
524
Number of elements transferred by each
DMA trigger
Number of triggers required to transfer
DMBCn elements
Bus released after the transfer of a single
element
A higher prioritized DMA request can pre-
empt an ongoing DMA transfer of lower
priority
Note: The bus is not released
DMMRQ0
DMMRQ3
INTDMA0
INTDMA3
CPU
Item
CPU
Figure 15-17: Block Transfer Example (2 Channels)
Table 15-3: Comparison of DMA Transfer Modes
CPU
<1>
Chapter 15 DMA Functions (DMA Controller)
Note
DMA3
<1>
DMA3
User’s Manual U16702EE3V2UD00
<1>
<2>
DMA3
<1>
DMBCn triggers
Single transfer
DMA3
<1>
mode
yes
yes
1
CPU
DMA0 DMA0
<2>
<2>
DMBCn elements
Fixed Channel
transfer mode
DMA0
<2>
yes
no
1
DMA0
<2>
CPU
Block transfer mode
DMBCn elements
CPU
CPU
no
no
1
CPU