upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 621
upd70f3402
Manufacturer Part Number
upd70f3402
Description
32-/16-bit Single-chip Microcontroller With Can Interface
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3402.pdf
(852 pages)
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(23) CAN message control register m (CnMCTRLm)
(a) Read
(b) Write
(a) Read
Note: The MUC bit is undefined until the first reception and storage is performed.
Remark:
CnMCTRLm
CnMCTRLm
MUC
The CnMCTRLm register is used to control the operation of the message buffer.
MOW
0
1
IE
0
1
0
1
Note
Figure 16-46: CAN Message Control Register m (CnMCTRLm) Format (1/3)
MOW is not set to 1 even if a remote frame is received and stored in the transmit message
buffer with DN = 1.
The message buffer is not overwritten by a newly received data frame.
The message buffer is overwritten by a newly received data frame.
The CAN module is not updating the message buffer (reception and storage).
The CAN module is updating the message buffer (reception and storage).
Receive message buffer: Valid message reception completion interrupt disabled.
Transmit message buffer: Normal message transmission completion interrupt disabled.
Receive message buffer: Valid message reception completion interrupt enabled.
Transmit message buffer: Normal message transmission completion interrupt enabled.
15
15
0
7
0
0
7
0
14
14
0
6
0
0
6
0
MUC
User’s Manual U16702EE3V2UD00
13
13
Bit indicating that message buffer data is being updated
5
0
0
5
0
Chapter 16 FCAN Controller
Message buffer interrupt request enable bit
MOW
MOW
Clear
12
12
0
4
0
4
Message buffer overwrite status bit
Clear
Set
11
11
IE
IE
IE
0
3
3
Clear
DN
DN
10
10
0
2
0
2
Clear
TRQ
TRQ
TRQ
Set
9
0
1
9
1
Clear
RDY
RDY
RDY
Set
8
0
0
8
0
see Table
Address R/W After reset
Address R/W After reset
16-16
R/W
00000000B
00x000000
621
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