MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 190

• Manufacturer Part Number: MC68EN360AI25VL
• Manufacturer: Freescale

Specifications of MC68EN360AI25VL

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Compliant

CPU32+
the system context in existence prior to the exception. The RTE instruction is designed to
accomplish this task.
When RTE is executed, the processor examines the stack frame on top of the supervisor
stack to determine if it is valid and determines what type of context restoration must be per-
formed. See 5.5.4 CPU32+ Stack Frames for a description of stack frames.
For a normal four-word frame, the processor updates the SR and PC with data pulled from
the stack, increments the SSP by 8, and resumes normal instruction execution. For a six-
word frame, the SR and PC are updated from the stack, the active SSP is incremented by
12, and normal instruction execution resumes.
For a bus fault frame, the format value on the stack is first checked for validity. In addition,
the version number on the stack must match the version number of the processor that is
attempting to read the stack frame. The version number is located in the most significant
byte (bits 15–8) of the internal register word at location SP
validity check ensures that stack frame data will be properly interpreted in multiprocessor
systems.
If a frame is invalid, a format error exception is taken. If it is inaccessible, a bus error excep-
tion is taken. Otherwise, the processor reads the entire frame into the proper internal regis-
ters, de-allocates the stack (12 words), and resumes normal processing. Bus error frames
for faults during exception processing require the RTE instruction to rewrite the faulted stack
frame. If an error occurs during any of the bus cycles required by rewrite, the processor
halts.
If a format error occurs during RTE execution, the processor creates a normal four-word
fault stack frame below the frame that it was attempting to use. If a bus error occurs, a bus-
error stack frame will be created. The faulty stack frame remains intact, so that it may be
examined and repaired by an exception handler or used by a different type of processor
(e.g., MC68010, MC68020, or future M68000 processor) in a multiprocessor system.
5.5.3 Fault Recovery
There are four phases of recovery from a fault: recognizing the fault, saving the processor
state, repairing the fault (if possible), and restoring the processor state. Saving and restoring
the processor state are described in the following paragraphs.
The stack contents are identified by the special status word (SSW). In addition to identifying
the fault type represented by the stack frame, the SSW contains the internal processor state
corresponding to the fault.
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For More Information On This Product,
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MC68360 USER’S MANUAL
Go to: www.freescale.com
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