MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 791

• Manufacturer Part Number: MC68EN360AI25VL
• Manufacturer: Freescale

Specifications of MC68EN360AI25VL

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Compliant

Applications
To control the signal flow, one I/O pin is dedicated as test master mode (MM) control. The
latch is used to allow the master mode test bus signals to become I/O in the normal board
application, if required. Otherwise, the latch may be removed. The arrows indicate the signal
flow direction for TDI and TDO. In each figure, TDI is the input data signal from the external
tester, and MTDI is the input data generated by the QUICC.
9-71
MUX:
IF MM = 1 THEN A
IF MM = 0 THEN B
TMS
TCK
TDO
TDI
Figure 9-24. Signal Routing with TAP Port Used in Board Test
A
B
MUX
EN
FROM LAST DEVICE IN SCAN LOOP
OUT
A
B
Freescale Semiconductor, Inc.
MUX
For More Information On This Product,
EN
OUT
MC68360 USER’S MANUAL
1
Go to: www.freescale.com
TO FIRST DEVICE IN SCAN LOOP
A
B
MUX
EN
OUT
1
A
B
MUX
EN
OUT
EN
IN TEST MASTER MODE
I/O FUNCTIONS IF NOT
B
A
MUX
EN
OUT
LATCH
TDI
MM
MTCK
MTMS
MTDI
MTDO
TMS
TCK
TDO
QUICC WITH
TAP IN USE