MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 730

• Manufacturer Part Number: MC68EN360AI25VL
• Manufacturer: Freescale

Specifications of MC68EN360AI25VL

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Compliant

Applications
9.1.3 Software Configuration
The following paragraphs discuss a number of key points for a software writer desiring to
initialize the system. The items discussed are those that are required to enable the previous
hardware configurations.
9.1.3.1 BASIC INITIALIZATION. The following paragraphs describe the basic initialization
procedures for the QUICC.
The module base address register (MBAR) should be set as desired; however, it is unwise
to allow the QUICC 8-kbyte block of address space to overlap any memory array.
The module base address register enable (MBARE) should not be accessed.
The module configuration register (MCR) should be set as desired. ASTM and BSTM may
be left cleared since their functions are not used in this system. The user should program
9-10
Figure 9-7. Glueless Interface to Standalone DRAM
D15–D0
SYSTEM BUS
AND
QUICC-GENERATED
SIGNALS
RAS1
CAS2
CAS3
R/W
D31–D16
RAS1
A10–A2
CAS0
CAS1
R/W
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
DQ15–DQ0
RAS
LCAS
DQ15–DQ0
RAS
UCAS
UCAS
W
LCAS
W
HIGH-ORDER
BYTES 2 & 3
MCM54260
LOW-ORDER
MCM54260
BYTES 0 & 1
256K 16
256K 16
DRAM
DRAM
WORD
WORD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A0
A1
A2
A3
A4
A5
A6
A7
A8
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8