MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 206

• Manufacturer Part Number: MC68EN360AI25VL
• Manufacturer: Freescale

Specifications of MC68EN360AI25VL

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Compliant

CPU32+
.
The serial data word is 17 bits wide—16 data bits and a status/control (S/C) bit.
Bit 16 indicates the status of CPU-generated messages as listed in Table 5-21
Command and data transfers initiated by the development system should clear bit 16. The
current implementation ignores this bit; however, Motorola reserves the right to use this bit
for future enhancements.
5-64
S/C
16
15
• LOAD: NOT READY/ RESPONSE
• PERFORM COMMAND
• STORE RESULTS
• ASSERT FREEZE SIGNAL
• WAIT FOR COMMAND
Encoding
EXECUTE COMMAND
CPU32 ACTIVITY
0
0
1
1
1
ENTER (BDM)
Figure 5-21. BDM Command Execution Flowchart
Table 5-21. CPU Generated Message Encoding
Freescale Semiconductor, Inc.
FFFF
FFFF
Data
0000
0001
xxxx
For More Information On This Product,
MC68360 USER’S MANUAL
Valid Data Transfer
Command Complete; Status OK
Not Ready with Response; Come Again
BERR Terminated Bus Cycle; Data Invalid
Illegal Command
Go to: www.freescale.com
"NOT READY"
IF RESULTS =
CONTINUE
NO
DATA FIELD
Message Type
YES
DEVELOPMENT SYSTEM ACTIVITY
READ RESULTS/NEW COMMAND
• LOAD COMMAND REGISTER
• ENABLE SHIFT CLOCK
• SHIFT OUT 17 BITS
• DISABLE SHIFT CLOCK
• LOAD COMMAND REGISTER
• ENABLE SHIFT CLOCK
• SHIFT IN/OUT 17 BITS
• DISABLE SHIFT CLOCK
• READ RESULT REGISTER
SEND INITIAL COMMAND
0