MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 47

• Manufacturer Part Number: MC68EN360AI25VL
• Manufacturer: Freescale

Specifications of MC68EN360AI25VL

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Compliant

Figure 1-20 shows a general-purpose application that includes Ethernet, AppleTalk, an
HDLC connection to a T1 line, an HDLC connection to frame relay, a UART debug monitor
port, a totally transparent data stream port, and an SPI connection to a serial EEPROM.
1.7 QUICC SYSTEM BUS CONFIGURATIONS
Figure 1-21 shows a master-slave QUICC configuration. This system gives eight SCCs, four
SMCs, two SPIs, four IDMAs, etc. Each QUICC uses its own DMA capability, but the
CPU32+ is the only processor in the system. More QUICCs can be easily supported on the
system bus, if desired.
UART
DEBUG
PORT
EEPROM
SERIAL
RS-232
Figure 1-21. Master-Slave QUICC Implementation
SYSTEM
BUS
Figure 1-20. General-Purpose Application
Freescale Semiconductor, Inc.
For More Information On This Product,
MASTER
SPI
SMC2
QUICC
CPU32+
MC68360 USER’S MANUAL
SCC3
Go to: www.freescale.com
QUICC
SMC
SMC
SCC
SCC
SCC
SCC
SPI
ASSIGNER
QUICC SYSTEM BUS
SLOT
TIME
SCC4
SMC1
SCC1
SCC2
TRANSCEIVER
TRANSCEIVER
MOTOROLA
QUICC
SLAVE
RS-422
T1 LINE
CPU32+
RS-232
RS-232
SIA
SMC
SMC
SCC
SCC
SCC
SCC
SPI
TRANSPARENT DATA
ETHERNET
APPLE TALK
FRAME RELAY (HDLC)
X.25 (HDLC)
Introduction