MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 726

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MC68EN360AI25VL

Manufacturer Part Number
MC68EN360AI25VL
Description
Manufacturer
Freescale
Datasheet

Specifications of MC68EN360AI25VL

Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Operating Supply Voltage (max)
3.3V
Operating Supply Voltage (min)
2.7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
FQFP
Lead Free Status / RoHS Status
Compliant

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Applications
During initialization, CS0 should be programmed to respond to a 256-Kbyte area in this
design.
9.1.2.4 SRAM. Figure 9-4 shows the glueless interface to an SRAM. In this case, a full 32-
bit-wide SRAM bank is assumed, but an 8- or 16-bit-wide bank would also be possible at the
expense of performance. The CS3 pin should be programmed to respond to a 128-Kbyte
area in this design.
9-6
Figure 9-3. Glueless Interface to Flash EPROM
CS0
OE
A17–A0
WE0
D31–D24
SYSTEM BUS AND
QUICC-GENERATED SIGNALS
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
+12V
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
VPP
OE
WE (Write)
CE (Enable)
FLASH EPROM
256K 8
PORT SIZE
27F020
BYTE
A14
A10
A11
A12
A13
A15
A16
A17
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9

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