MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 683

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MC68EN360AI25VL

Manufacturer Part Number
MC68EN360AI25VL
Description
Manufacturer
Freescale
Datasheet

Specifications of MC68EN360AI25VL

Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Operating Supply Voltage (max)
3.3V
Operating Supply Voltage (min)
2.7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
FQFP
Lead Free Status / RoHS Status
Compliant

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7.14.4 Port A Registers
Port A has four memory-mapped, read-write, 16-bit control registers.
7.14.4.1 PORT A OPEN-DRAIN REGISTER (PAODR). The PAODR indicates a normal or
wired-OR configuration of the port pins. Six of the PAODR bits can be open-drain to corre-
spond to those pins that have serial channel output capability. The other bits are always
zero. PAODR is cleared at system reset.
For each ODx bit, the definition is as follows:
7.14.4.2 PORT A DATA REGISTER (PADAT). A read of PADAT returns the data at the
pin, independent of whether the pin is defined as an input or an output. This allows detection
of output conflicts at the pin by comparing the written data with the data on the pin. A write
to the PADIR is latched, and if that bit in the PADIR is configured as an output, the value
latched for that bit will be driven onto its respective pin. PADAT can be read or written at any
time. PADAT is not initialized and is undefined at reset.
7.14.4.3 PORT A DATA DIRECTION REGISTER (PADIR). PADIR is cleared at system
reset.
For each DRx bit, the definition is as follows:
7.14.4.4 PORT A PIN ASSIGNMENT REGISTER (PAPAR). PAPAR is cleared at system
reset.
DR15
DD15
D15
15
15
15
15
0
0 = The I/O pin is actively driven as an output.
1 = The I/O pin is an open-drain driver. As an output, the pin is actively driven low, but
0 = The corresponding pin is an input.
1 = The corresponding pin is an output.
DR14
DD14
D14
14
14
14
14
0
in three-stated otherwise.
DR13
DD13
D13
13
13
13
13
0
DR12
DD12
D12
12
12
12
12
0
Freescale Semiconductor, Inc.
DR11
DD11
D11
11
11
11
11
0
For More Information On This Product,
DR10
DD10
D10
10
10
10
10
0
MC68360 USER’S MANUAL
Go to: www.freescale.com
DR9
DD9
D9
0
9
9
9
9
DR8
DD8
D8
8
0
8
8
8
OD7
DR7
DD7
D7
7
7
7
7
OD6
DR6
DD6
D6
6
6
6
6
OD5
DR5
DD5
D5
5
5
5
5
OD4
DR4
DD4
D4
4
4
4
4
OD3
DR3
DD3
D3
3
3
3
3
Parallel I/O Ports
DR2
DD2
D2
2
0
2
2
2
OD1
DR1
DD1
D1
1
1
1
1
DR0
DD0
D0
0
0
0
0
0

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