MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 22

• Manufacturer Part Number: MC68EN360AI25VL
• Manufacturer: Freescale

Specifications of MC68EN360AI25VL

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Compliant

Table of Contents
Paragraph
Number
7.11.14.3
7.11.14.4
7.11.14.5
7.11.14.6
7.11.14.7
7.11.14.8
7.11.14.9
7.11.14.10
7.12
7.12.1
7.12.2
7.12.3
7.12.4
7.12.4.1
7.12.4.2
7.12.4.3
7.12.5
7.12.5.1
7.12.5.2
7.12.5.3
7.12.5.3.1
7.12.5.3.2
7.12.5.3.3
7.12.5.3.4
7.12.5.3.5
7.12.5.3.6
7.12.5.4
7.12.5.4.1
7.12.5.4.2
7.12.5.4.3
7.12.5.5
7.12.5.5.1
7.12.5.5.2
7.12.5.6
7.12.5.7
7.12.6
7.12.7
7.12.8
7.13
7.13.1
7.13.2
7.13.3
7.13.4
7.13.5
7.13.5.1
xviii
SMC Commands in GCI Mode ............................................................7-307
SMC GCI Mode Register (SMCMR) ....................................................7-308
SMC Monitor Channel Rx BD ..............................................................7-309
SMC Monitor Channel Tx BD...............................................................7-310
SMC C/I Channel Receive Buffer Descriptor (Rx BD) .........................7-310
SMC C/I Channel Transmit Buffer Descriptor (Tx BD).........................7-311
SMC Event Register (SMCE)...............................................................7-311
SMC Mask Register (SMCM)...............................................................7-312
Serial Peripheral Interface (SPI) ..........................................................7-312
Overview ..............................................................................................7-312
SPI Key Features.................................................................................7-313
SPI Clocking and Pin Functions...........................................................7-314
SPI Transmit/Receive Process ............................................................7-315
SPI Master Mode .................................................................................7-315
SPI Slave Mode ...................................................................................7-316
SPI Multi-Master Operation..................................................................7-316
SPI Programming Model......................................................................7-317
SPI Mode Register (SPMODE)............................................................7-317
SPI Command Register (SPCOM).......................................................7-319
SPI Parameter RAM Memory Map ......................................................7-320
BD Table Pointer (RBASE, TBASE) ....................................................7-320
SPI Function Code Registers (RFCR, TFCR)......................................7-321
Maximum Receive Buffer Length Register (MRBLR) ..........................7-322
Receiver Buffer Descriptor Pointer (RBPTR).......................................7-322
Transmitter Buffer Descriptor Pointer (TBPTR) ...................................7-323
Other General Parameters...................................................................7-323
SPI Commands....................................................................................7-323
INIT TX PARAMETERS Command .....................................................7-323
CLOSE Rx BD Command....................................................................7-323
INIT RX PARAMETERS Command.....................................................7-323
SPI Buffer Descriptor Ring...................................................................7-324
SPI Receive Buffer Descriptor (Rx BD) ...............................................7-324
SPI Transmit Buffer Descriptor (Tx BD)...............................................7-326
SPI Event Register (SPIE) ...................................................................7-328
SPI Mask Register (SPIM) ...................................................................7-329
SPI Master Example ............................................................................7-329
SPI Slave Example ..............................................................................7-330
SPI Interrupt Handling..........................................................................7-331
Parallel Interface Port (PIP) .................................................................7-331
PIP Key Features.................................................................................7-331
PIP Overview .......................................................................................7-332
General-Purpose I/O Pins (Port B) ......................................................7-333
Interlocked Data Transfers...................................................................7-333
Pulsed Data Transfers .........................................................................7-334
Busy Signal ..........................................................................................7-335
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
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