MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 594

• Manufacturer Part Number: MC68EN360AI25VL
• Manufacturer: Freescale

Specifications of MC68EN360AI25VL

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Compliant

Serial Management Controllers (SMCs)
7.11.2 General SMC Mode Register (SMCMR)
The operating mode of each SMC port is defined by the 16-bit, memory-mapped, read-write
SMCMR. See the specific SMC protocol for more information on this register.
7.11.3 SMC Buffer Descriptors
When the SMCs are configured to operate in GCI mode, the memory structure for the SMCs
is pre-defined to be one word long for transmit and one word long for receive. These one-
word structures are detailed later when the GCI operation is described in more detail.
However, in UART and transparent modes of operation, the SMCs have a memory structure
that is like that of the SCCs. The data associated with the SMCs is stored in buffers. Each
buffer is referenced by BD organized in a buffer descriptor ring located in the dual-port RAM
(see Figure 7-74).
The BD ring allows the user to define buffers for transmission and buffers for reception. Each
BD ring forms a circular queue. The CP confirms reception and transmission (or indicates
error conditions) using the BDs to inform the processor that the buffers have been serviced.
The actual buffers may reside in either external memory or internal memory. Data buffers
may reside in the parameter area of an SCC or SMC if that channel is not enabled.
7.11.4 SMC Parameter RAM
Each SMC parameter RAM area begins at the same offset from each SMC base area. The
protocol-specific portions of the SMC parameter RAM are discussed in the specific protocol
7-270
POINTER TO SMCx
POINTER TO SMCx
DUAL-PORT RAM
TX DATA BUFFER
TX RING
RX RING
Freescale Semiconductor, Inc.
Figure 7-74. SMC Memory Structure
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
FRAME STATUS
FRAME STATUS
DATA POINTER
DATA POINTER
DATA LENGTH
DATA LENGTH
TX BD RING
RX BD RING
EXTERNAL MEMORY
TX DATA BUFFER
RX DATA BUFFER