MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 46

• Manufacturer Part Number: MC68EN360AI25VL
• Manufacturer: Freescale

Specifications of MC68EN360AI25VL

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Compliant

Introduction
1.6 QUICC SERIAL CONFIGURATION EXAMPLES
Figure 1-19 shows a situation where multiple QUICCs can communicate over a TDM line.
This can be used, for instance, to implement an 8-channel line card. The SCCs implement
the line interfaces, and the SMCs provide the local on-board communication between the
QUICCs. The additional SMC on each QUICC can be used as a serial debug port. The SPI
can be used to interface to peripherals, such as a serial EEPROM.
1-16
Figure 1-19. Multiple QUICC TDM Bus Implementation
OVER A TIME SLOT.
BETWEEN QUICCs
TWO SMCs ARE
COMMUNICATE
NOTE: The eight SCCs and two SMCs support 10 time slots on the TDM bus.
USED TO
LOCALLY
Figure 1-18. Dual TDM Bus Implementation
Freescale Semiconductor, Inc.
The length and position of the time slots are made with time slot assigners.
NOTE: Two TDM buses may be simultaneously supported
For More Information On This Product,
ANY COMBINATION OF SCCs
CONNECTED TO ANY TDM.
SCC
SCC
SCC
SCC
SMC
SMC
AND SMCs MAY BE
with the time slot assigner.
MC68360 USER’S MANUAL
SCC
SCC
SCC
SCC
SMC
SMC
SCC
SCC
SCC
SCC
SMC
SMC
QUICC
Go to: www.freescale.com
QUICC
QUICC
ASSIGNER
SLOT
TIME
ASSIGNER
ASSIGNER
SLOT
SLOT
TIME
TIME
TDM BUS 1
TDM BUS 2
TDM BUS