MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 456

• Manufacturer Part Number: MC68EN360AI25VL
• Manufacturer: Freescale

Specifications of MC68EN360AI25VL

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Compliant

Serial Communication Controllers (SCCs)
If the CTS pin is programmed to envelope the data, the CTS pin must remain asserted dur-
ing frame transmission, or a CTS lost error occurs (see Figure 7-41). The negation of the
CTS pin forces the RTS pin high, forcing the transmit data to the idle state. If the CTSS bit
in the GSMR is zero, the CTS pin must be sampled by the SCC before a CTS lost is recog-
nized. Otherwise, the negation of CTS immediately causes the CTS lost condition.
7-132
(OUTPUT)
(OUTPUT)
(OUTPUT)
(OUTPUT)
NOTE: CTSS = 1 in GSMR. CTSP is a don't care.
(INPUT)
NOTE: CTSS = 0 in GSMR. CTSP is a don't care.
(INPUT)
TCLK
TCLK
CTS
CTS
RTS
RTS
TXD
TXD
Figure 7-40. Output Delays from CTS Asserted for Synchronous Protocols
Freescale Semiconductor, Inc.
For More Information On This Product,
FIRST BIT OF FRAME DATA
CTS SAMPLED LOW HERE
FIRST BIT OF FRAME DATA
MC68360 USER’S MANUAL
Go to: www.freescale.com
LAST BIT OF FRAME DATA
LAST BIT OF FRAME DATA