MCF5282CVF80J Freescale Semiconductor, MCF5282CVF80J Datasheet - Page 131
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MCF5282CVF80J
Manufacturer Part Number
MCF5282CVF80J
Description
IC MPU 512K FLASH 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5282CVF80J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF528x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5282-KIT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5282CVF80J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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The Flash state machine flags errors in command write sequences by means of the ACCERR and PVIOL
flags in the CFMUSTAT register. An erroneous command write sequence self-aborts and sets the
appropriate flag. The ACCERR or PVIOL flags must be cleared before commencing another command
write sequence.
A summary of the programming algorithm is shown in
verify algorithms with the exceptions noted in step 1 above.
6.4.3.3
Table 6-13
Freescale Semiconductor
2. Write the program, erase, or verify command to CFMCMD, the command buffer. See
3. Launch the command by writing a 1 to the CBEIF flag. This clears CBEIF. When command
Section 6.4.3.3, “Flash Valid
execution is complete, the Flash state machine sets the CCIF flag. The CBEIF flag is also set
again, indicating that the address, data, and command buffers are ready for a new command
sequence to begin.
summarizes the valid Flash user commands.
Flash Valid Commands
CFMCMD
The page erase command operates simultaneously on adjacent erase pages
in two interleaved Flash physical blocks. Thus, a single erase page is
effectively 2 Kbyte.
By writing a 0 to CBEIF, a command sequence can be aborted after the
longword write to the CFM array or the command write to the CFMCMD
and before the command is launched. The ACCERR flag will be set on
aborted commands and must be cleared before a new command write
sequence.
0x05
0x20
0x40
0x41
0x06
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Page erase
Meaning
Program
Erase
erase
erase
verify
Page
Mass
verify
Table 6-13. Flash User Commands
Commands.”
Verify that all 256 Kbytes of Flash from two interleaving physical
blocks are erased. If both blocks are erased, the BLANK bit will
be set in the CFMUSTAT register upon command completion.
Program a 32-bit longword.
Erase 2 Kbyte of Flash. Two 1024-byte pages from interleaving
physical blocks are erased in this operation.
Erase all 256 Kbytes of Flash from two interleaving physical
blocks. A mass erase is only possible when no PROTECT bits
are set for that block.
Verify that the two 1024-byte pages are erased. If both pages
are erased, the BLANK bit will be set in the CFMUSTAT register
upon command completion.
NOTE
NOTE
Figure
Description
6-13. The flow is similar for the erase and
ColdFire Flash Module (CFM)
6-19
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