MCF5282CVF80J Freescale Semiconductor, MCF5282CVF80J Datasheet - Page 396
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MCF5282CVF80J
Manufacturer Part Number
MCF5282CVF80J
Description
IC MPU 512K FLASH 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5282CVF80J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF528x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5282-KIT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5282CVF80J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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DMA Timers (DTIM0–DTIM3)
21-4
ORRI
Field
15–8
FRR
CLK
RST
7–6
2–1
OM
PS
CE
5
4
3
0
Prescaler value. Divides the clock input (internal bus clock/(16 or 1) or clock on DTINn)
0x00 1
...
0xFF 256
Capture edge.
00 Disable capture event output. Timer in reference mode.
01 Capture on rising edge only
10 Capture on falling edge only
11 Capture on any edge
Output mode.
0 Active-low pulse for one internal bus clock cycle (12.5-ns resolution at 80 MHz)
1 Toggle output.
Output reference request, interrupt enable. If ORRI is set when DTERn[REF] is set, a DMA request or an interrupt
occurs, depending on the value of DTXMRn[DMAEN] (DMA request if set, interrupt if cleared).
0 Disable DMA request or interrupt for reference reached (does not affect DMA request or interrupt on capture
1 Enable DMA request or interrupt upon reaching the reference value.
Free run/restart
0 Free run. Timer count continues incrementing after reaching the reference value.
1 Restart. Timer count is reset immediately after reaching the reference value.
Input clock source for the timer. Avoid setting CLK when RST is already set. Doing so causes CLK to zero (stop
counting).
00 Stop count
01 Internal bus clock divided by 1
10 Internal bus clock divided by 16. This clock source is not synchronized with the timer; therefore, successive
11 DTINn pin (falling edge)
Reset timer. Performs a software timer reset similar to an external reset, although other register values can be written
while RST is cleared. A transition of RST from 1 to 0 resets register values. The timer counter is not clocked unless
the timer is enabled.
0 Reset timer (software reset)
1 Enable timer
function).
time-outs may vary slightly.
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Table 21-2. DTMRn Field Descriptions
Description
Freescale Semiconductor
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