MCF5282CVF80J Freescale Semiconductor, MCF5282CVF80J Datasheet - Page 218

• Manufacturer Part Number: MCF5282CVF80J
• Description: IC MPU 512K FLASH 256MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF528xr

Specifications of MCF5282CVF80J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 150
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Processor Series: MCF528x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5282-KIT
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

Chip Select Module
between the data bus and the external byte strobe control lines (BS[3:0]). Note that all byte lanes are
driven, although the state of unused byte lanes is undefined.
12.3.1.2 External Boot Chip Select Operation
CS0, the external boot chip select, allows address decoding for boot ROM before system initialization. Its
operation differs from other external chip select outputs after system reset.
After system reset, CS0 is asserted for every external access. No other chip select can be used until the
valid bit, CSMR0[V], is set, at which point CS0 functions as configured and CS[6:1] can be used. At reset,
the port size function of the external boot chip select is determined by the logic levels of the inputs on
D[19:18].
multiplexed with D[19:18].
Provided the required address range is in the chip select address register (CSAR0), CS0 can be
programmed to continue decoding for a range of addresses after the CSMR0[V] is set, after which the
external boot chip select can be restored only by a system reset.
12.4
Table 12-5
12-4
Chip Select Registers
Table 12-4
shows the chip select register memory map. Reading reserved locations returns zeros.
Table 12-4. D[19:18] External Boot Chip Select Configuration
and
Figure 12-1. Connections for External Memory Port Sizes
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Table 12-4
32-bit port
16-bit port
8-bit port
data bus
External
memory
memory
memory
D[19:18]
00
01
10
11
list the various reset encodings for the configuration signals
D[31:24]
Byte 0
Byte 0
Byte 2
Byte 0
Byte 1
Byte 2
Byte 3
BS3
Boot Device/Data Port Size
D[23:16]
Byte 1
Byte 1
Byte 3
BS2
External (16-bit)
External (32-bit)
Internal (32-bit)
External (8-bit)
Driven, undefined
D[15:8]
Byte 2
Driven, undefined
BS1
Byte 3
D[7:0]
BS0
Freescale Semiconductor