MCF5282CVF80J Freescale Semiconductor, MCF5282CVF80J Datasheet - Page 612
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MCF5282CVF80J
Manufacturer Part Number
MCF5282CVF80J
Description
IC MPU 512K FLASH 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5282CVF80J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF528x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5282-KIT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5282CVF80J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
- Current page: 612 of 766
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Reset Controller Module
29.4.2
The RSR contains a status bit for every reset source. When reset is entered, the cause of the reset condition
is latched along with a value of 0 for the other reset sources that were not pending at the time of the reset
condition. These values are then reflected in RSR. One or more status bits may be set at the same time.
The cause of any subsequent reset is also recorded in the register, overwriting status from the previous reset
condition.
RSR can be read at any time. Writing to RSR has no effect.
29-4
Bit(s)
Bit(s)
3
2
1
0
7
6
5
4
Reset Status Register (RSR)
LVDRE
Name
LVDIE
Name
SOFT
LVDE
WDR
LVD
Address
—
—
Reset
Field
R/W
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
—
Table 29-3. RCR Field Descriptions (continued)
LVD interrupt enable. Controls the LVD interrupt if LVDE is set. This bit has no effect if
the LVDE bit is a logic 0.
1 LVD interrupt enabled
0 LVD interrupt disabled
LVD reset enable. Controls the LVD reset if LVDE is set. This bit has no effect if the
LVDE bit is a logic 0. LVD reset has priority over LVD interrupt, if both are enabled.
1 LVD reset enabled
0 LVD reset disabled
Reserved, should be cleared.
Controls whether the LVD is enabled.
1 LVD is enabled
0 LVD is disabled
Reserved, should be cleared.
Low voltage detect. Indicates that the last reset state was caused by an LVD reset.
1 Last reset state was caused by an LVD reset
0 Last reset state was not caused by an LVD reset
Software reset flag. Indicates that the last reset was caused by software.
1 Last reset caused by software
0 Last reset not caused by software
Watchdog timer reset flag. Indicates that the last reset was caused by a watchdog
timer timeout.
1 Last reset caused by watchdog timer timeout
0 Last reset not caused by watchdog timer timeout
7
Figure 29-3. Reset Status Register (RSR)
Table 29-4. RSR Field Descriptions
LVD
6
SOFT
5
IPSBAR + 0x11_0001
Reset Dependent
WDR
4
R
POR
Description
Description
3
EXT
2
LOC
1
LOL
0
Freescale Semiconductor
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