MCF5282CVF80J Freescale Semiconductor, MCF5282CVF80J Datasheet - Page 44

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MCF5282CVF80J

Manufacturer Part Number
MCF5282CVF80J
Description
IC MPU 512K FLASH 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet

Specifications of MCF5282CVF80J

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF528x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5282-KIT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5282CVF80J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Overview
byte, word, longword or 16-byte burst line transfers. These transfers are triggered by software, explicitly
setting a DCRn[START] bit or the occurrence of a hardware event from one of the on-chip peripheral
devices, such as a capture event or an output reference event in a DMA timer (DTIMn) for each channel.
The DMA controller supports dual-address mode to on-chip devices.
1.1.17
The reset controller is provided to determine the cause of reset, assert the appropriate reset signals to the
system, and keep track of what caused the last reset. The power management registers for the internal
low-voltage detect (LVD) circuit are implemented in the reset module. There are seven sources of reset:
External reset on the RSTO pin is software-assertable independent of chip reset state. There are also
software-readable status flags indicating the cause of the last reset, and LVD control and status bits for
setup and use of LVD reset or interrupt.
1.2
1.2.1
The MCF5282’s integrated Fast Ethernet Controller (FEC) performs the full set of IEEE 802.3/Ethernet
CSMA/CD media access control and channel interface functions. The FEC supports connection and
functionality for the 10/100 Mbps 802.3 media independent interface (MII). It requires an external
transceiver (PHY) to complete the interface to the media.
1.2.2
The FlexCAN module is a communication controller implementing the CAN protocol. The CAN protocol
can be used as an industrial control serial data bus, meeting the specific requirements of real-time
processing, reliable operation in a harsh EMI environment, cost-effectiveness, and required bandwidth.
FlexCAN contains 16 message buffers.
1.2.3
The I
exchange, minimizing the interconnection between devices. This bus is suitable for applications requiring
occasional communications over a short distance between many devices.
1-12
2
C bus is a two-wire, bidirectional serial bus that provides a simple, efficient method of data
External
Power-on reset (POR)
Watchdog timer
Phase-locked loop (PLL) loss of lock
PLL loss of clock
Software
Low-voltage detection (LVD) reset
MCF5282-Specific Features
Reset
Fast Ethernet Controller (FEC)
FlexCAN
I
2
C Bus
The MCF5214 and MCF5216 devices do not contain an FEC module.
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
NOTE
Freescale Semiconductor

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