MCF5282CVF80J Freescale Semiconductor, MCF5282CVF80J Datasheet - Page 357
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MCF5282CVF80J
Manufacturer Part Number
MCF5282CVF80J
Description
IC MPU 512K FLASH 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5282CVF80J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF528x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5282-KIT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5282CVF80J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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18.5.2
The watchdog timer programming model consists of these registers:
18.5.2.1 Watchdog Control Register (WCR)
The 16-bit WCR configures watchdog timer operation.
Freescale Semiconductor
•
•
•
•
Watchdog control register (WCR), which configures watchdog timer operation
Watchdog modulus register (WMR), which determines the timer modulus
reload value
Watchdog count register (WCNTR), which provides visibility to the watchdog counter value
Watchdog service register (WSR), which requires a service sequence to
prevent reset
Address
Registers
Reset
Reset
Field
Field
R/W
R/W
1
IPSBAR Offset
S = CPU supervisor mode access only. S/U = CPU supervisor or user mode access. User
mode accesses to supervisor only addresses have no effect and result in a cycle termination
transfer error.
0x0014_0000
0x0014_0002
0x0014_0004
0x0014_0006
15
7
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Table 18-2. Watchdog Timer Module Memory Map
Figure 18-2. Watchdog Control Register (WCR)
14
6
—
R
Bits 15–8
Watchdog Count Register (WCNTR)
Watchdog Modulus Register (WMR)
Watchdog Service Register (WSR)
Watchdog Control Register (WCR)
IPSBAR + 0x0014_0000, 0x0014_0001
13
5
12
4
0000_0000
0000_1111
—
R
WAIT
11
3
Bits 7–0
DOZE
10
2
R/W
HALTED
Access
9
1
S/U
S/U
S
S
Watchdog Timer Module
1
EN
8
0
18-3
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