MCF5282CVF80J Freescale Semiconductor, MCF5282CVF80J Datasheet - Page 367
MCF5282CVF80J
Manufacturer Part Number
MCF5282CVF80J
Description
IC MPU 512K FLASH 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5282CVF80J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF528x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5282-KIT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5282CVF80J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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When the PCSRn[OVW] bit is set, counter can be directly initialized by writing to PMRn without having
to wait for the count to reach 0x0000.
19.3.3
The 16-bit PIT counter and prescaler supports different timeout periods. The prescaler divides the internal
bus clock period as selected by the PCSRn[PRE] bits. The PMRn[PM] bits select the timeout period.
19.3.4
Table 19-6
The PIF flag is set when the PIT counter reaches 0x0000. The PIE bit enables the PIF flag to generate
interrupt requests. Clear PIF by writing a 1 to it or by writing to the PMR.
Freescale Semiconductor
PIT CLOCK
MODULUS
COUNTER
PIF
shows the interrupt request generated by the PIT.
Timeout Specifications
Interrupt Operation
0x0002
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Timeout period
Interrupt Request
Figure 19-6. Counter in Free-Running Mode
Timeout
Table 19-6. PIT Interrupt Requests
=
2
----------------------------------------------------------------------- -
0x0001
PCSRn[PRE]
×
f
0x0005
(PMRn[PM]
sys
Flag
PIF
+
0x0000
1)
Enable Bit
Programmable Interrupt Timers (PIT0–PIT3)
PIE
0xFFFF
Eqn. 19-1
19-7
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