MCF5282CVF80J Freescale Semiconductor, MCF5282CVF80J Datasheet - Page 747
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MCF5282CVF80J
Manufacturer Part Number
MCF5282CVF80J
Description
IC MPU 512K FLASH 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5282CVF80J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF528x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5282-KIT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5282CVF80J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Freescale Semiconductor
Table 30-12/Page
Table 30-20/Page
Table 26-1/Page
Table 33-3/Page
Table 33-8/Page
Table 33-8/Page
33.13.1/Page
Chapter 27
Chapter 33
Location
Section
30-14
30-35
33-21
26-5
33-3
33-7
33-7
Change description field for DTOUT1 from “DMA timer 1 output / Port TD[3]...” to “DMA timer 1 output /
Change description field for DTIN0 from “DMA timer 0 input / Port TD[3]...” to “DMA timer 1 output / Port
Change description field for DTOUT0 from “DMA timer 0 output / Port TD[3]...” to “DMA timer 1 output /
The CLKMOD pins determine the clock mode regardless of RCON assertion during reset. Because of
Add the following note to the PBR[Address] field description:
Note: PBR[0] should always be loaded with a 0.
Change CSR’s initial state to 0x0000_0000.
Add the following note:
In the V
In the PLL Electrical Specifications table, only specs for the 80MHz MCF5282 device were listed. Insert
Change EXTAL Input High Voltage (V
Change EXTAL Input Low Voltage (V
Remove second sentence:
• Removed the RCON[RPLLREF, RPLLSEL] bit fields and descriptions.
• Added the following note in the Reset Configuration section: “The CLKMOD pins always determine the
• In the Configuration During Reset table, Clock Mode section, changed the Default Configuration from
• In Clock Mode Selection section, changed “The clock mode is selected during reset and reflected...” to
• In Clock Mode Selection table, added CLKMOD[1:0] column showing the corresponding CLKMOD
Port TD[2]...”
TD[1]...”
Port TD[0]...”
this, the following were done for clarity:
clock mode, regardless of the RCON pin value.”
“RCON[7:6]” to “N/A”
“The clock mode is selected during reset by the CLKMOD pins and reflected...”
settings for each mode.
“It is crucial during power-up that VDD never exceeds VDDH by more that ~0.3V. There are diode
devices between the two voltage domains, and violating this rule can lead to a latch-up condition.”
“I
specs for the 66MHz device in the first 2 rows and also declare symbol f
“V
OH
XTAL
= -5.0mA” and “I
OH
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
“There is no minimum frequency requirement.”
PLL Reference Frequency Range
System Frequency
+ 0.4”.
and V
Table B-7. Rev. 2.3 to Rev. 3 Changes (continued)
1:1 Mode
External Clock Mode
On-Chip PLL Frequency
Crystal reference
External reference
OL
Characteristic
entries, change the respective I
OL
= +2.0mA” to “I
1
ILEXT
IHEXT
) Crystal Mode maximum spec from “1.0” to “V
OL
) Crystal Mode minimum spec from “V
f
Symbol
= +5.0mA”
ref_crystal
Description
f
f
ref_ext
ref_1:1
f
sys
OH
and I
f
ref
33.33
Min
2
2
0
OL
/ 32
specs from “I
f
66MHz
sys(max)
66.66
66.66
66.66
8.33
8.33
Max
sys(max)
OH
f
80MHz
sys(max)
= -2.0mA” to
10.0
10.0
80
80
80
DD
, as shown below:
- 1.0” to
MHz
MHz
Unit
XTAL
Revision History
- 0.4”.
B-11
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