MCF5282CVF80J Freescale Semiconductor, MCF5282CVF80J Datasheet - Page 755
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MCF5282CVF80J
Manufacturer Part Number
MCF5282CVF80J
Description
IC MPU 512K FLASH 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5282CVF80J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF528x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5282-KIT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5282CVF80J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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J
JTAG
Freescale Semiconductor
interrupts
memory map 10-4
operation
registers
block diagram 31-1
electrical characteristics
features 31-2
initialization 31-9
instructions
low-power modes 7-13
memory map 31-4
overview 31-1
registers
ColdFire Flash module 6-23
debug 2-21
FlexCAN 25-17
overview 10-1
PIT 19-7
prioritization 10-4
QADC
recognition 10-3
sources 10-13
vector determination 10-4
general 10-2
low-power modes 7-9
(IACKLPRn) 10-11
interrupt control (ICRnx) 10-12
interrupt force high/low (INTFRCHn, INTFRCLn) 10-9
interrupt pending high/low (IPRHn, IPRLn) 10-6
interrupt request level (IRLRn) 10-11
mask high/low (IMRHn, n) 10-7
boundary scan timing 33-25
nonscan chain operation 31-9
restrictions 31-9
BYPASS 31-9
CLAMP 31-9
ENABLE_TEST_CTRL 31-8
EXTEST 31-7
HIGHZ 31-8
IDCODE 31-7
LOCKOUT_RECOVERY 31-8
SAMPLE/PRELOAD 31-7
TEST_LEAKAGE 31-8
boundary scan 31-5
bypass 31-5
IDCODE 31-4
instruction shift (IR) 31-4
operation 28-68
sources 28-68
,
30-37
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
L
Listen-only mode 25-12
LOCKOUT_RECOVERY instruction 31-8
Lowest buffer transmitted first (LBUF) 25-21
Low-power modes
M
MAPGA package 32-9
Memory map
TAP controller 31-6
timing diagrams
doze 7-6
peripheral behavior
run 7-5
stop 7-6
summary 7-13
wait 7-6
chip configuration module 27-3
clock module 9-5
JTAG_CFM_CLKDIV 31-5
TEST_CTRL 31-5
BKPT timing 33-27
boundary scan 33-26
test access port 33-26
test clock input 33-26
TRST timing 33-27
chip configuration module 7-9
chip select module 7-7
clock module 7-10
ColdFire Flash module 7-7
core 7-6
debug 7-13
DMA controller 7-7
DMA timers 7-8
EPORT 7-10
Ethernet 7-9
FlexCAN 7-11
general purpose timers 7-11
GPIO 7-9
I
interrupt controller 7-9
JTAG 7-13
modules 7-8
programmable interrupt timers 7-10
QADC 7-11
QSPI 7-8
reset controller 7-9
SCM 7-7
SDRAM controller 7-7
SRAM 7-6
watchdog timer 7-10
2
C 7-8
,
7-13
Index-7
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