MCF5282CVF80J Freescale Semiconductor, MCF5282CVF80J Datasheet - Page 652
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MCF5282CVF80J
Manufacturer Part Number
MCF5282CVF80J
Description
IC MPU 512K FLASH 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5282CVF80J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF528x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5282-KIT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5282CVF80J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Debug Support
)
Likewise, the following BDM sequence is needed to write an accumulator register:
BdmWriteACCn (
)
Additionally, it is required that writes to the accumulator extension registers be performed after the
corresponding accumulators are updated. This is needed since a write to any accumulator alters the
contents of the corresponding extension register.
For more information on saving and restoring the complete EMAC programming model, see
Section 3.3.1.2, “Saving and Restoring the EMAC Programming
30.5.3.3.10 Write Control Register (
The operand (longword) data is written to the specified control register. The write alters all 32 register bits.
Command/Result Formats:
30-34
rcreg
wcreg
rcreg
wcreg
wcreg
wcreg
Command
Result
accn;
#saved_data,macsr;// restore the original macsr
macsr;
#0,macsr;
#data,accn;
#saved_data,macsr;// restore the original macsr
15
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
0x2
0x0
0x0
Figure 30-35.
12
// read the desired accumulator
// read macsr contents & save
// disable all rounding modes
// write the desired accumulator
11
WCREG
WCREG
0x8
0x0
)
Command/Result Formats
D[31:16]
8
D[15:0]
7
Model”.
0x8
0x0
Rc
4
3
Freescale Semiconductor
0x0
0x0
0
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