MCF5282CVF80J Freescale Semiconductor, MCF5282CVF80J Datasheet - Page 561
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MCF5282CVF80J
Manufacturer Part Number
MCF5282CVF80J
Description
IC MPU 512K FLASH 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5282CVF80J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF528x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5282-KIT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5282CVF80J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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28.6.6.2 QADC Status Register 1 (QASR1)
Stop mode resets this register .
Freescale Semiconductor
Q2 Pause Bit Set
Reset
R/W:
Field
Q2 Paused
Q1 Complete
Q1 Idle/
Q2 Trigger Event
Q1 Trigger Event
15
Q2 Active
Q1 Idle/
Q2 Paused
Q1 Active/
Q1 Trigger Event
Q2 Trigger Event
—
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Q1 Complete
Q1 Trigger Event
14
Delayed Transition
Q2 Complete
Q1 Pause Bit Set
Q2 Suspended
Figure 28-12. Queue Status Transition
Q1 Paused/
Q1 Active/
Q2 Paused
CWPQ15
13
Q1 Trigger Event
(Temporary)
Q2 Trigger
Pending
Q1 Idle/
Q1 Idle/
Q2 Idle
Q2 Trigger Event
CWPQ14
Q1 Complete
Q1 Pause Bit Set
12
Q2 Pause Bit Set
0011_1111
Q1 Complete
R
Q1 Trigger Event
Q2 Trigger
Q1 Active/
Pending
Q1 Pause Bit Set
CWPQ13
Q2 Trigger Event
11
Q1 Paused/
Q2 Active
Delayed Transition
Q1 Active/
CWPQ12
Q2 Idle
Queued Analog-to-Digital Converter (QADC)
Q1 Trigger Event
10
(Temporary)
Q1 Paused/
Q2 Trigger
Pending
CWPQ11
Q1 Pause Bit Set
Q2 Complete
9
Q1 Paused/
Q2 Idle
CWPQ10
8
28-23
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