MCF5282CVF80J Freescale Semiconductor, MCF5282CVF80J Datasheet - Page 358

• Manufacturer Part Number: MCF5282CVF80J
• Description: IC MPU 512K FLASH 256MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF528xr

Specifications of MCF5282CVF80J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 150
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Processor Series: MCF528x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5282-KIT
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

Watchdog Timer Module
18.5.2.2 Watchdog Modulus Register (WMR)
18-4
Bit(s)
15–4
3
2
1
0
Address
Reset
Reset
Field
Field
R/W
R/W
HALTED
Name
DOZE
WAIT
WM15
EN
WM7
—
15
7
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Figure 18-3. Watchdog Modulus Register (WMR)
WM14
Reserved, should be cleared.
Wait mode bit. Controls the function of the watchdog timer in wait mode. Once written,
the WAIT bit is not affected by further writes except in halted mode. Reset sets WAIT.
1 Watchdog timer stopped in wait mode
0 Watchdog timer not affected in wait mode
Doze mode bit. Controls the function of the watchdog timer in doze mode. Once
written, the DOZE bit is not affected by further writes except in halted mode. Reset
sets DOZE.
1 Watchdog timer stopped in doze mode
0 Watchdog timer not affected in doze mode
Halted mode bit. Controls the function of the watchdog timer in halted mode. Once
written, the HALTED bit is not affected by further writes except in halted mode.
During halted mode, watchdog timer registers can be written and read normally. When
halted mode is exited, timer operation continues from the state it was in before
entering halted mode, but any updates made in halted mode remain. If a write-once
register is written for the first time in halted mode, the register is still writable when
halted mode is exited.
1 Watchdog timer stopped in halted mode
0 Watchdog timer not affected in halted mode
Note: Changing the HALTED bit from 1 to 0 during halted mode starts the watchdog
timer. Changing the HALTED bit from 0 to 1 during halted mode stops the watchdog
timer.
Watchdog enable bit. Enables the watchdog timer. Once written, the EN bit is not
affected by further writes except in halted mode. When the watchdog timer is disabled,
the watchdog counter and prescaler counter are held in a stopped state.
1 Watchdog timer enabled
0 Watchdog timer disabled
WM6
14
6
Table 18-3. WCR Field Descriptions
WM13
WM5
IPSBAR + 0x0014_0002, 0x0014_0003
13
5
WM12
WM4
12
4
1111_1111
1111_1111
R/W
R/W
Description
WM11
WM3
11
3
WM10
WM2
10
2
WM9
WM1
9
1
Freescale Semiconductor
WM0
WM8
8
0