MCF5282CVF80J Freescale Semiconductor, MCF5282CVF80J Datasheet - Page 423
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MCF5282CVF80J
Manufacturer Part Number
MCF5282CVF80J
Description
IC MPU 512K FLASH 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5282CVF80J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF528x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5282-KIT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5282CVF80J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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23.2
Table 23-1
Figure 23-2
23.3
This section contains a detailed description of each register and its specific function. Flowcharts in
Section 23.5, “Initialization/Application
Writing control bytes into the appropriate registers controls the operation of the UART module.
Freescale Semiconductor
•
UTXDn
URXDn
UCTSn
URTSn
Start/end break interrupt/status
External Signal Description
Memory Map/Register Definition
Signal
briefly describes the UART module signals.
shows a signal configuration for a UART/RS-232 interface.
UART registers are accessible only as bytes.
Interrupt can mean an interrupt request asserted to the CPU or a DMA
request.
Transmitter Serial Data Output. UTXDn is held high (mark condition) when the transmitter is
disabled, idle, or operating in the local loopback mode. Data is shifted out on UTXDn on the
falling edge of the clock source, with the least significant bit (lsb) sent first.
Receiver Serial Data Input. Data received on URXDn is sampled on the rising edge of the clock
source, with the lsb received first.
Clear-to- Send. This input can generate an interrupt on a change of state.
Request-to-Send. This output can be programmed to be negated or asserted automatically by
the receiver or the transmitter. When connected to a transmitter’s UCTSn, URTSn can control
serial data flow.
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Table 23-1. UART Module External Signals
Figure 23-2. UART/RS-232 Interface
URTSn
UCTSn
UTXDn
URXDn
UART
Information,” describe basic UART module programming.
NOTE
NOTE
Description
RS-232 Transceiver
DI2
DO2
DI1
DO1
UART Modules
23-3
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