MCF5282CVF80J Freescale Semiconductor, MCF5282CVF80J Datasheet - Page 444
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MCF5282CVF80J
Manufacturer Part Number
MCF5282CVF80J
Description
IC MPU 512K FLASH 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5282CVF80J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF528x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5282-KIT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5282CVF80J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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UART Modules
23.4.4
Setting UMR1n[PM] programs the UART to operate in a wake-up mode for multidrop or multiprocessor
applications. In this mode, a master can transmit an address character followed by a block of data
characters targeted for one of up to 256 slave stations.
Although slave stations have their receivers disabled, they continuously monitor the master’s data stream.
When the master sends an address character, the slave receiver notifies its respective CPU by setting
USRn[RXRDY] and generating an interrupt (if programmed to do so). Each slave station CPU then
compares the received address to its station address and enables its receiver if it wishes to receive the
subsequent data characters or block of data from the master station. Unaddressed slave stations continue
monitoring the data stream. Data fields in the data stream are separated by an address character. After a
slave receives a block of data, its CPU disables the receiver and repeats the process. Functional timing
information for multidrop mode is shown in
23-24
Multidrop Mode
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
CPU
Disabled
Disabled
Figure 23-23. Remote Loopback
Rx
Tx
Figure
Disabled
Disabled
23-24.
URXDn Input
UTXDn Output
Freescale Semiconductor
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