MCF5282CVF80J Freescale Semiconductor, MCF5282CVF80J Datasheet - Page 251
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MCF5282CVF80J
Manufacturer Part Number
MCF5282CVF80J
Description
IC MPU 512K FLASH 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5282CVF80J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF528x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5282-KIT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5282CVF80J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Freescale Semiconductor
MAPBGA Pin
R11
R14
P11
T14
T11
R8
N7
H1
K2
K3
K1
T8
J4
J2
TEST
TCK
TIP
TS
UCTS[1:0]
URTS[1:0]
URXD[2:0]
UTXD[2:0]
XTAL
Abbreviation
Table 14-3. MCF5282 Signals and Pin Numbers Sorted by Function
CLKMOD0
CLKMOD1
Primary
CLKOUT
Table 14-2. MCF5282 Alphabetical Signal Index (continued)
EXTAL
RCON
RSTO
XTAL
RSTI
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
D26
D17
D16
D19
D18
D21
2
Reserved, should be connected to VSS.
JTAG test logic clock.
Asserted to indicate that a bus transfer is in progress. Negated
during idle bus cycles.
Asserted during the first CLKOUT cycle of a transfer when
address and attributes are valid.
Signals UART that it can begin data transmission.
Automatic UART request to send outputs.
Receiver serial data inputs.
Transmitter serial data outputs.
Internal oscillator connection to the external crystal.
Pin Functions
Secondary
Chip Configuration/Mode Selection
PB1
PB0
PB3
PB2
PB5
PA2
—
—
—
—
—
—
—
—
Tertiary
Reset
Clock
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Function
Reset in
Reset out
External clock/crystal in
Crystal drive
Clock out
Clock mode select
Clock mode select
Reset configuration enable
Chip mode
Chip mode
Chip mode
Boot device/data port size
Boot device/data port size
Output pad drive strength
Description
Primary
I/O
O
O
O
O
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
Signal Descriptions
O
O
O
I
I
I
I
I
Pull-up
Internal
Yes
Yes
Yes
Yes
—
—
—
—
—
—
—
—
—
—
14-11
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