MCF5282CVF80J Freescale Semiconductor, MCF5282CVF80J Datasheet - Page 69
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MCF5282CVF80J
Manufacturer Part Number
MCF5282CVF80J
Description
IC MPU 512K FLASH 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5282CVF80J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF528x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5282-KIT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5282CVF80J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
- Current page: 69 of 766
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ColdFire processors load hardware configuration information into the D0 and D1 general-purpose
registers after system reset. The hardware configuration information is loaded immediately after the
reset-in signal is negated. This allows an emulator to read out the contents of these registers via the BDM
to determine the hardware configuration.
Information loaded into D0 defines the processor hardware configuration as shown in
Freescale Semiconductor
EMAC
31–24
23–20
19–16
Field
MAC
VER
REV
FPU
DIV
PF
Reset
Reset
15
14
13
12
BDM: Load: 0x080 (D0)
W
W
R
R MAC
Processor family. This field is fixed to a hex value of 0xCF indicating a ColdFire core is present.
ColdFire core version number. Defines the hardware microarchitecture version of ColdFire core.
0001 V1 ColdFire core
0010 V2 ColdFire core (This is the value used for this device.)
0011 V3 ColdFire core
0100 V4 ColdFire core
0101 V5 ColdFire core
Else Reserved for future use
Processor revision number. The default is 0b0000.
MAC present. This bit signals if the optional multiply-accumulate (MAC) execution engine is present in processor core.
0 MAC execute engine not present in core. (This is the value used for this device.)
1 MAC execute engine is present in core.
Divide present. This bit signals if the hardware divider (DIV) is present in the processor core.
0 Divide execute engine not present in core.
1 Divide execute engine is present in core.
EMAC present. This bit signals if the optional enhanced multiply-accumulate (EMAC) execution engine is present in
processor core.
0 EMAC execute engine not present in core.
1 EMAC execute engine is present in core. (This is the value used for this device.)
FPU present. This bit signals if the optional floating-point (FPU) execution engine is present in processor core.
0 FPU execute engine not present in core. (This is the value used for this device.)
1 FPU execute engine is present in core.
Store: 0x180 (D0)
31
15
1
0
DIV EMAC FPU
30
14
1
1
29
13
0
1
Table 2-9. D0 Hardware Configuration Info Field Description
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
28
12
0
0
Figure 2-18. D0 Hardware Configuration Info
PF
27
11
1
0
0
26
10
1
0
0
(This is the value used for this device.)
25
1
0
0
9
Description
24
1
0
0
8
23
0
7
1
22
0
6
0
VER
ISA
21
1
0
5
20
0
0
4
19
0
0
3
Access: User read-only
Figure
18
0
0
2
DEBUG
REV
BDM read-only
2-18.
ColdFire Core
17
0
0
1
2-23
16
0
0
0
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