HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 117

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

7.1
The user break controller (UBC) provides functions that simplify program debugging. Break
conditions are set in the UBC and a user break interrupt is generated according to the conditions of
the bus cycle generated by the CPU, DMAC, or DTC. This function makes it easy to design an
effective self-monitoring debugger, enabling the chip to easily debug programs without using a
large in-circuit emulator.
7.1.1
The features of the user break controller are:
Break compare conditions can be set:
User break interrupt generated upon satisfying break conditions. A user-designed user break
interrupt exception processing routine can be run.
Select either to break in the CPU instruction fetch cycle before the instruction is executed or
after.
Address
CPU cycle/DMA cycle
Instruction fetch or data access
Read or write
Operand size: byte/word/longword
Features
Overview
Section 7 User Break Controller (UBC)
Rev. 5.00 Jan 06, 2006 page 95 of 818
Section 7 User Break Controller (UBC)
REJ09B0273-0500