HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 19

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
18.3 Pin Configuration.............................................................................................................. 542
18.4 Register Configuration...................................................................................................... 543
18.5 Register Descriptions ........................................................................................................ 544
18.6 On-Board Programming Modes........................................................................................ 550
18.7 Programming/Erasing Flash Memory ............................................................................... 556
18.8 Protection .......................................................................................................................... 561
18.9 Flash Memory Emulation in RAM ................................................................................... 565
18.10 Note on Flash Memory Programming/Erasing ................................................................. 567
18.11 Flash Memory Programmer Mode .................................................................................... 567
18.12 Notes when Converting the F-ZTAT Application Software to the Mask-ROM
Section 19 ROM (256 kB Version)
19.1 Features ............................................................................................................................. 585
19.2 Overview........................................................................................................................... 586
18.2.6 Block Configuration ............................................................................................ 542
18.5.1 Flash Memory Control Register 1 (FLMCR1)..................................................... 544
18.5.2 Flash Memory Control Register 2 (FLMCR2)..................................................... 547
18.5.3 Erase Block Register 1 (EBR1) ........................................................................... 548
18.5.4 RAM Emulation Register (RAMER)................................................................... 549
18.6.1 Boot Mode ........................................................................................................... 551
18.6.2 User Program Mode............................................................................................. 555
18.7.1 Program Mode ..................................................................................................... 556
18.7.2 Program-Verify Mode.......................................................................................... 557
18.7.3 Erase Mode .......................................................................................................... 559
18.7.4 Erase-Verify Mode .............................................................................................. 559
18.8.1 Hardware Protection ............................................................................................ 561
18.8.2 Software Protection.............................................................................................. 562
18.8.3 Error Protection.................................................................................................... 563
18.11.1 Socket Adapter Pin Correspondence Diagram..................................................... 568
18.11.2 Programmer Mode Operation .............................................................................. 570
18.11.3 Memory Read Mode ............................................................................................ 571
18.11.4 Auto-Program Mode ............................................................................................ 575
18.11.5 Auto-Erase Mode................................................................................................. 578
18.11.6 Status Read Mode ................................................................................................ 579
18.11.7 Status Polling ....................................................................................................... 581
18.11.8 Programmer Mode Transition Time .................................................................... 582
18.11.9 Notes On Memory Programming......................................................................... 583
Versions ............................................................................................................................ 583
19.2.1 Block Diagram ..................................................................................................... 586
19.2.2 Mode Transitions ................................................................................................. 587
19.2.3 On-Board Programming Modes........................................................................... 588
................................................................................ 585
Rev. 5.00 Jan 06, 2006 page xvii of xx

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