HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 459

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

14.2
14.2.1
A/D data registers 0 to 15 (ADDR0 to ADDR15) are 16-bit read-only registers that store the
results of A/D conversion. There are 16 registers, corresponding to analog inputs 0 to 15 (AN0 to
AN15).
The ADDR registers are initialized to H'0000 by a power-on reset, and in hardware standby mode
and software standby mode.
The A/D converter converts analog input to a 10-bit digital value. The upper 8 bits of this data are
stored in the upper byte of the ADDR corresponding to the selected channel, and the lower 2 bits
in the lower byte of that ADDR. Only the most significant 2 bits of the ADDR lower byte data are
valid.
Table 14.3 shows correspondence between the analog input channels and A/D data registers.
(n = 0 to 15)
(upper byte)
Initial value:
Initial value:
(lower byte)
ADDRnH
Register Descriptions
A/D Data Registers 0 to 15 (ADDR0 to ADDR15)
ADDRnL
R/W:
R/W:
Bit:
Bit:
AD9
AD1
R
R
7
0
7
0
AD8
AD0
R
R
6
0
6
0
AD7
—
R
R
5
0
5
0
AD6
—
R
R
4
0
4
0
Rev. 5.00 Jan 06, 2006 page 437 of 818
AD5
—
R
R
3
0
3
0
ADR
Section 14 A/D Converter
—
R
R
2
0
2
0
REJ09B0273-0500
AD3
—
R
R
1
0
1
0
AD2
—
R
R
0
0
0
0